Home
>
eJournals
> find it @ Stanford
Report a connection problem
find it @ Stanford
Article: FPGA design, simulation and prototyping of a high speed 32-bit pipeline multiplier based on Vedic mathematics
Journal: Ieice Electronics Express [1349-2543]
Author: Abdul Rahman M. Alamoud
Year: 2015
Volume: 12
Issue: 16
Pages: 20150450 - 20150450
Online full text
J-STAGE Free
From 2004
Unpaywall Open Access
Web search
Google Scholar
Article Title
Author Name
Journal Title
Other Search
Find it in print
SearchWorks (Stanford catalog)
UC Library Search (Berkeley catalog)
OCLC WorldCat® (other nearby libraries)
Staff licensing tools
Course Packs and E-Reserves Terms
ILL Terms
Perpetual Access Terms
Walk-In Patrons Terms
If you cannot access content or use features on this website due to a disability, please
report your accessibility issue
.
© 2024 SFX by Ex Libris Inc.
Terms of Use
CrossRef Enabled